pyside6: workaround big.LITTLE architectures

Compiler flags are passed to shiboken which uses those with clang.
GCC supports big.LITTLE architecture TUNEs (cortex-a72.cortex-a53)
that clang does not. This causes some targets to fail with
    error: unsupported argument 'cortex-a72.cortex-a53+crc+crypto' to option '-mcpu='

Workaround this by replacing big.LITTLE mcpu args with LITTLE only.
Follows similar workaround done in meta-clang when clang toolchain is used.

Change-Id: I4042cbfb1d48b940539ec970058025ea0b2be937
Reviewed-by: Ari Parkkila <ari.parkkila@qt.io>

recipes-python/pyside6/python3-pyside6_git.bb

@@ -43,12 +43,22 @@ export LLVM_INSTALL_DIR = "${STAGING_DIR_NATIVE}${exec_prefix}"
 
 PYSIDE_COMPILER = "${HOST_SYS}-g++"
 PYSIDE_COMPILER:toolchain-clang = "${HOST_SYS}-clang++"
+# Workaround big.LITTLE architecture args not supported by clang
+PYSIDE_COMPILER_FLAGS = "${@d.getVar('HOST_CC_ARCH') \
+    .replace('cortex-a15.cortex','cortex') \
+    .replace('cortex-a17.cortex','cortex') \
+    .replace('cortex-a57.cortex','cortex') \
+    .replace('cortex-a72.cortex','cortex') \
+    .replace('cortex-a73.cortex','cortex') \
+    .replace('cortex-a75.cortex','cortex') \
+    .replace('cortex-a76.cortex','cortex')} \
+"
 
 EXTRA_OECMAKE += "\
     -DSTANDALONE=ON \
     -DPYSIDE_TREAT_QT_INCLUDE_DIRS_AS_NON_SYSTEM=ON \
     -DSHIBOKEN_GENERATOR_EXTRA_FLAGS='\
-        --clang-options=--sysroot=${STAGING_DIR_TARGET},--target=${HOST_SYS},${@d.getVar('HOST_CC_ARCH').replace(' ',',')} \
+        --clang-options=--sysroot=${STAGING_DIR_TARGET},--target=${HOST_SYS},${@d.getVar('PYSIDE_COMPILER_FLAGS').replace(' ',',')} \
         --compiler-path=${PYSIDE_COMPILER} \
     ' \
 "