From 4a6ace0a965965ea15e88c3418c7158ca5cc9f8f Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Thu, 21 Nov 2019 10:12:05 -0800
Subject: [PATCH] architecture: Recognise RISCV-32/RISCV-64

Upstream-Status: Backport [https://github.com/systemd/systemd/commit/171b53380085b1288b03b19a2b978f36a5c003d0]
Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 src/architecture.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/architecture.h b/src/architecture.h
index 26679e2..89c7d32 100644
--- a/src/architecture.h
+++ b/src/architecture.h
@@ -57,6 +57,8 @@ enum {
         ARCHITECTURE_M68K,
         ARCHITECTURE_TILEGX,
         ARCHITECTURE_CRIS,
+       ARCHITECTURE_RISCV32,
+       ARCHITECTURE_RISCV64,
         _ARCHITECTURE_MAX,
         _ARCHITECTURE_INVALID = -1
 };
@@ -194,6 +196,17 @@ int uname_architecture(void);
 #elif defined(__cris__)
 #  define native_architecture() ARCHITECTURE_CRIS
 #  error "Missing LIB_ARCH_TUPLE for CRIS"
+#elif defined(__riscv)
+#  if __SIZEOF_POINTER__ == 4
+#    define native_architecture() ARCHITECTURE_RISCV32
+#    define LIB_ARCH_TUPLE "riscv32-linux-gnu"
+#  elif __SIZEOF_POINTER__ == 8
+#    define native_architecture() ARCHITECTURE_RISCV64
+#    define LIB_ARCH_TUPLE "riscv64-linux-gnu"
+#  else
+#    error "Unrecognized riscv architecture variant"
+#  endif
+#  define PROC_CPUINFO_MODEL "cpu model"
 #else
 #  error "Please register your architecture here!"
 #endif
-- 
2.24.0

